Test Pattern Generation for Multiple Stuck-at Faults Using Zero Suppressed Binary Decision Diagrams
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Optimization of Bdd by Chaotic Evolution Algorithm and Its Application in Test of Stuck- Open Faults in Digital Circuits
The binary decision diagram (BDD) is an efficient graph representation of logic Boolean functions, it has wide applications in a lot of areas, such as computer science, circuit design and test. The size of binary decision diagram depends on the variable ordering which is used. A new approach is presented in this paper for the variable ordering and the optimization of binary decision diagrams, t...
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A new hierarchical design error diagnosis algorithm for combinational circuits is proposed, which is based on the stuck-at fault model and assumes the case of single logic gate errors. Decision diagrams are used for representing and localizing stuck-at faults at the higher signal path level. On the basis of detected faulty signal paths, suspected stuck-at faults at gate inputs are calculated, a...
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